Accellera Day Videos from DVCon U.S. 2020 Available!
Tutorial: Portable Stimulus: What's Coming in 1.1 and What it Means for You
This technical tutorial provides an overview of the proposed PSS 1.1 standard. Presenters review the basic modeling constructs, use model and test realization specifications in a PSS verification intent model and show the enhanced capabilities being implemented for 1.1. View the tutorial >
Luncheon Panel focused on the Portable Stimulus Standard
As a follow-up to the tutorial on the Portable Stimulus Standard (PSS), attendees were given the opportunity to interact with members of the Portable Stimulus Working Group and ask their most pressing questions. Listen to the panel discussion >
Short Workshop: An Introduction to the Emerging IP Security Assurance Standard
The workshop, presented by members of the IP Security Assurance Working Group focuses on: Methodology, detailing the overall concept and workflow along with the individual components, dependencies, and assumptions; Security weakness knowledge base, highlighting potential IP security concerns; OpenCores examples to demonstrate how the methodology applies to real IP cores; Summary and outlook, providing the road map and expectations moving forward. View the workshop >
Short Workshop: How HLS and SystemC is Delivering on its Promise of Design and Verification Productivity
The workshop begins with an introduction to the SystemC Synthesizable Subset and an introduction to basic concepts of how HLS works to go from a SystemC/C++ description to quality RTL. Real-world use-cases and the results achieved are presented by Intel and NVIDIA. View the workshop >
Video from DAC 2020 Now Available
Accellera’s Functional Safety Working Group Addresses Standardization Efforts to Improve Automation, Interoperability, and Traceability
Accellera’s Functional Safety Working Group (FSWG) presented an overview at the virtual 57th Design Automation Conference of the scope, needs, and goals defined by the FSWG, including developments since its formation.
Introductions by Lu Dai, Accellera’s Chair, Martin Barnasconi, Technical Committee Chair, and Alessandra Nardi, FSWG Chair, were followed by informative presentations by functional safety experts focusing on specific perspectives, challenges, and opportunities.
Speakers include Bala Chavali, AMD; Ghani Kanawati, Arm; Jyotika Athavale, Intel; Franck Galtié, NXP Semiconductors; and Riccardo Vincelli, Renesas. The lively and Q&A session following the presentations is also available as part of the recording.
- Article: Accellera Tackles Functional Safety
- Article: Accellera IP Security Group Expects Standard by Year End
- Video: Accellera’s Chair Highlights 2020 Events & Working Group Activity
- July newsletter now available
- EDACafe Guest Blog: Make an Impact and Get Involved in Standards Development and Evolution by Lu Dai
- Functional Safety Working Group formed
- SystemC AMS User Guide released
- Philipp A. Hartmann to Receive Accellera Systems Initiative Technical Excellence Award
February 25th, 2020
- Accellera Forms Functional Safety Working Group to Standardize Data for Interoperability & Traceability in the Functional Safety Lifecycle
February 18th, 2020
- UVM-AMS Working Group Formed to Standardize UVM Analog/Mixed-Signal Extensions
November 19th, 2019